Doctoral Thesis - Non-Volatile Memory Design (f/m/div)
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Your Role
As an industrial doctorate at Infineon, you will pursue a doctoral degree at a University and gain professional experience simultaneously - an ideal start for your career. Advance your research with us and profit from our vast network of doctoral candidates and the expertise of a university. Mentorship is handled by both professors and dedicated Infineon employees. The research is carried out in cooperation with the Technical University of Munich and under the supervision of Prof. Dr.-Ing. Ulf Schlichtmann.
We are offering a doctoral thesis dealing with storing data in a Resistive Random Access Memory (RRAM), specifically employing more than two resistance levels, as to store more than a single logical bit in one physical memory cell. The first step will be to analyze multi-level storage of data in existing integrated RRAM modules. Here special emphasis is placed on the data retention of the information under harsh conditions, and on interdependencies between data retention and pre-conditioning and pre-cycling. The findings will influence the concept and the design of an RRAM module that can be integrated into a microcontroller. The implementation shall optimize the read and write performance of multi-level data, as well as converting the inherently larger data density into an actual area advantage over existing single-level RRAM modules. Here analog and digital design tasks will have to be performed, which have to go along for an optimized design. The project is supported by a grant, so continuous result documentation and interaction with the other partners of the collaboration will be part of the work. Overall, you will be working on a scientifically and commercially relevant topic.
Key Responsibilities In Your New Role
* Measurements: lab measurements on existing RRAM hardware
* Data analysis: evaluation of measurement results, extracting relevant information
* Module concept: concept for multi-level Resistive Random Access Memory (RRAM) module
* Module design: design of multi-level Resistive Random Access Memory (RRAM) module
* Collaboration: interaction with external partners of the collaboration
The learnings out of the thesis will lead to:
* Reliability evaluation and optimization for multi-level RRAM data storage
* Translation of the results into a concrete RRAM multi-level storage design
* Possible implementation in a product e.g. for edge AI applications, with optimized area utilization, enabling new applications
Your Profile
Qualifications And Skills You Need To Succeed
* Study field: master’s degree in electrical engineering or similar
* Way of working:
o enthusiastic for working scientifically and simultaneously for working in an industrial environment with a commercial orientation
o working well in a team
* Experience:
o in analog or full-custom circuit design and simulation
o in data analysis and documentation/presentation
* Programming skills: good command of Python
* Knowledge: handling of measurement equipment in lab environment
* Language skills: excellent English skills, both spoken and written; German is a plus
Contact: Britta Johansson
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