Imagine yourself at the center of our cutting-edge processor design in deep submicron technologies, and on standard cell library designs. You will drive concepts of transistor level circuit design, modeling and performance analysis, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. Strong understanding of Digital circuits & optimization for better PPA. Hands-on experience running SPICE simulations and high sigma variation analysis. Experience in Circuit design of high-performance flip flops, level shifters, retention flops and other complex circuits is a plus. Great teammate with good communication and analytical skills. Good layout design knowledge & parasitic optimization in various types of layouts. Experience in RTL2GDSII flow and/or Static Timing Analysis (STA) is a plus. Knowledge of deep submicron process issues & Finfet Technologies is a plus. Understanding of Timing characterization & modeling of Standard cell circuits is a plus. Strong proficiency in scripting languages like Perl, Python, and Tcl.