Job Description
As an NCG Engineer in Embedded Processing IC Development Division, you will work on the implementation, verification, and integration of RISC-based processor IP and SoC-level components. The role requires foundational digital design and verification skills and a strong willingness to grow into complex semiconductor development tasks. You will learn to operate within state-of-the-art EDA flows used across Renesas for processor, subsystem, and SoC programs.
Key Responsibilities (Technical Scope)
1. Digital Design & RTL Development: Contribute to module-level RTL implementation in Verilog or VHDL. Perform linting, CDC analysis, synthesis, and static timing analysis.
2. Verification & Validation: Develop and maintain SystemVerilog UVM-based testbenches, run regressions, analyze coverage, and debug functional issues.
3. Architecture & System Interaction: Apply RISC processor architecture knowledge and work with AMBA bus protocols (AXI/AHB/APB).
4. SoC / Subsystem Integration Support: Support front-end and back-end integration flows and assist with synthesis and timing analysis.
5. Tooling & Automation: Develop engineering automation using Perl, Python, or C++.
6. Software Interaction: Use ARM Assembler and C for test programs and bring-up support.
7. Artificial Intelligence: Participate in AI development for new Engineering Workflows.
Qualifications
8. Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
9. Basic understanding of semiconductor development flows and RISC architectures.
10. Hands-on experience with VHDL/Verilog, SystemVerilog UVM, linting, CDC, synthesis, and STA.
11. Programming skills in Perl, Python, and/or C++, plus embedded C and ARM Assembly.
12. Strong analytical skills, attention to detail, and effective written and verbal communication.
13. Fluent German and English.
Preferred Qualifications
14. Understanding of chip-level integration methodologies (front-end/back-end).
15. AI-based engineering automation or ML-assisted development tools.