At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently seeking a Coherency Verification Engineer to join one of our clients' teams. If you're looking for an exciting opportunity to grow in a innovative environment, this could be the perfect fit for you.
Responsibilities:
* Verify complex digital designs at RTL level according to architecture and design specifications.
* Develop and maintain verification environments using SystemVerilog and UVM.
* Create, execute, and debug test plans for block-level, subsystem-level, and top-level verification.
* Work on the verification of coherent systems, including cache-related functionality and interconnect behavior.
* Validate designs involving CHI protocol, cache structures, coherency mechanisms, and system-level interactions.
* Run and manage simulations, regressions, and debug failures using industry-standard verification tools.
* Apply both formal and dynamic verification methodologies to identify design issues early.
* Use scripting languages such as Python, Perl, Bash, or TCL to automate verification flows and regression processes.
* Collaborate closely with architecture, design, and verification teams to analyze specifications, clarify requirements, and resolve issues.
* Track, document, and communicate verification progress, bugs, coverage status, and technical risks.
* Contribute to continuous improvement of verification methodology, tools, and best practices.
* Master or PhD
* English C1
* Industrial experience +8 years
* Proficiency in SystemVerilog and UVM
* Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools
* Experience with simulation and simulation tools
* Knowledge of revision control methodology and tools (git, svn)
* Experience in block level and sub-system or top level verification
* Experience with formal and dynamic verification
* Strong problem-solving skills and attention to detail
* Excellent communication and teamwork abilities
* Knowledge of the CHI protocol
* Understanding of caches' structure and parameters
* Experience in verification of coherent systems