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Experienced ams physical design engineer (m, f, d)

München
Apple
Design Engineer
Inserat online seit: 22 August
Beschreibung

Experienced AMS Physical Design Engineer (M, F, D)At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a ground-breaking and uncommonly dedicated Physical Design Engineer in Munich. As a member of our multifaceted group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. In this role, you will be at the center of a PHY design effort collaborating with architecture, CAD, timing & logic design teams, with a critical impact on delivering best in class PHY designs. You will be required to do physical designs of best in class PHY design. Join us!DescriptionResponsibilities include, but are not limited to:Perform static timing analysis for high-speed IPs, including analog mixed-signal interfaces.Set up and optimize CTS for high-frequency, multi-clock networks.Develop floor-plans under strong area constraints, aligned for full chip integration.Optimize for low power at every implementation step.Perform full place and route on hierarchical design blocks, meeting timing, area, and power targets within project timelines.Implement ECOs for functional, timing, noise, EMIR, etc.Conduct physical design verification, provide feedback to macro owners, and participate in design reviews.Participate in physical design methodology meetings.Assist in AMS flow development to enhance our environment.Minimum QualificationsHands-on experience in floor-planning, place & route, physical verification, timing closure, and power/functional verification.Fluent in English, both spoken and written.Preferred QualificationsBSc in Electrical Engineering or equivalent.Experience with high PHY and/or SoC designs.Knowledge of low power implementation, static and dynamic, including UPF power flow.Deep understanding of timing constraints, exceptions, clock setup, and debugging.Proficiency with HDL languages like Verilog and basic SoC architecture.Experience with industry-standard physical design, STA, and synthesis tools.Proficiency in scripting languages such as Perl, TCL, or Shell.Experience with ECO implementation, equivalence checking, and debugging.Understanding of physical verification methodologies, LVS/DRC troubleshooting at chip/block level.Apple is an Equal Opportunity Employer committed to inclusion and diversity. We offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. We do not discriminate or retaliate against applicants discussing compensation or related topics. #J-18808-Ljbffr

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