Role Overview Own the bring-up, validation, and characterization of new silicon devices from first samples through production ramp. This engineer acts as the bridge between design, DFT/test, and product/yield engineering, ensuring the device meets all functional, performance, and reliability specifications. They debug silicon behavior, run detailed characterization, and provide deep root-cause analysis when results deviate from simulation or expected design targets. Must Have Proven experience in post-silicon validation, silicon debug, or product/validation engineering Hands-on experience with silicon bring-up and failure analysis Experience with verification, simulation and debugging at system, chip, and block level Ability to work with cross-functional teams ( Design, Test, Product, Yield ) Experience working in NPI environments and early silicon phases is a plus Responsibilities Serve as the primary interface between Test/Product Engineering and Design teams Define and implement Design Verification methods and strategies to ensure product performance and reliability Develop and specify preliminary DDR4 test program blocks based on simulated test cases Collaborate with cross-functional teams to optimize test coverage and efficiency Support lab activities, including debugging, wafer probing, ¬µprobing, and test execution Contribute to continuous improvement of verification processes and tools Define DFT strategies and implement together with Design automated test modes, m-BIST Your profile Background in Electrical Engineering, Microelectronics, or Computer Engineering Typically 3–8 years of experience in post-silicon validation, design verification, or product engineering Experience in memory products (DRAM, NAND, or high-speed interfaces) is highly desirable Comfortable working in both: Lab environment (hands-on debugging) Data analysis/scripting environment Strong problem-solving mindset with curiosity for root-cause analysis Able to bridge design intent and real silicon behavior Good communication skills to clearly present debug findings and drive resolution Ideal fit Solid understanding of mixed signal design and verification concepts Hands-on experience with lab bring-up and debug tools: ATE, Oscilloscopes, logic analyzers, protocol analyzers Knowledge of DFT/BIST architectures and failure diagnosis Ability to analyze silicon vs. simulation mismatches and identify root causes Strong Programming/Scripting skills Familiarity with Stand Alone / Embedded Memory designs and high-speed interfaces is a plus About us Ferroelectric Memory GmbH (FMC) is a pioneering semiconductor company based in Dresden, Germany, focused on next-generation non-volatile memory technology. Founded in 2016, FMC is at the forefront of innovation in ferroelectric memory, enabling faster, more energy-efficient, and scalable solutions for future computing systems. Our team combines deep expertise in semiconductor physics, device engineering, and system design to redefine memory architectures for emerging applications in AI, IoT, and high-performance computing. Join us and be part of a team shaping the future of memory technology. Why FMC? Cutting-edge memory technology Strong presence in the Dresden semiconductor ecosystem High ownership and impact-driven roles International and collaborative team Direct contribution to AI and next-generation computing