As a Circuit Design Intern for the custom circuits, you will build your skills in the below areas: - Work on new cell architectures and optimization for PPA improvement - Analyse layout and identify parasitic reducing options to improve cell PPA - Be involved in technical discussions on new standard cell circuit development - Collaborate with different teams to ensure IP production and quality is met Currently enrolled in your penultimate year of studies in a CE, EE, CS or related field (or your final year for an internship which is required to complete your course). You must be enrolled as a student for the full duration of the internship. Fluent English language skills (written and verbal) Preliminary understanding of CMOS circuits, device characteristics and PPA oriented design An understanding of layout design and how to drive PPA via parasitic optimization, in addition to SPICE simulators Good proficiency in scripting languages like Perl, Python and Tcl Excellent problem solving and analytical thinking skills Collaboration skills