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#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Senior Staff Engineer SoC Design on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?
Your Role
Key responsibilities in your new role:
* Timing Closure Execution, develop and implement STA timing closure strategies for both block level and full chip integration ensuring high quality results.
* End to End Ownership, take full ownership of the RTL2GDS flow including logic synthesis, floor planning, place and route, and timing closure.
* Cross Functional Collaboration, partner with teams across RTL design, DFT and all aspects of Physical Design to enable smooth integration and high-quality deliverables.
* Methodology and Workflow Optimization, define, enhance and deploy design flows, methodologies and automation processes to improve QoR and accelerate project cycles.
* Technical Leadership, provide technical guidance to team members fostering career development and upskilling within the team.
* Industry knowledge and innovation, stay up to date with advancements in EDA tools and process nodes and apply state-of-the-art tools to enhance the design and implementation process.
Your Profile
Qualifications And Skills To Help You Succeed:
* Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related field.
* At least 5 years of hands‑on experience in ASIC physical design, including advanced nodes and high-performance design projects.
* Strong technical expertise across the RTL2GDS flow, covering synthesis, SSTA, place and route, timing analysis, physical verification, and implementation of functional, timing, and physical ECOs.
* In-depth knowledge of digital design principles and computer architectures.
* Direct experience working with industry‑standard EDA tools such as Synopsys Fusion Compile, Synopsys PrimeTime, Cadence Innovus, and Cadence Tempus.
* Skilled in scripting languages including TCL, Perl, and Python for automation and workflow optimization.
* Demonstrated ability to collaborate effectively within cross‑functional teams, share knowledge proactively, and apply a structured, detail‑oriented approach to problem‑solving and analysis.
Contact
Bruna Fernandes, LinkedIn
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game‑changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Diversity & Inclusion
Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant’s experience and skills.
We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity & Inclusion at Infineon.
Job Details
Location: Munich, Bavaria, Germany
Employment type: Full-time
Seniority level: Not Applicable
Job function: Engineering and Information Technology
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