Digital Verification UWB Expert (m/f/d)
Freelance/Contracting project Remote Start date: asap Reference number: 868600/1
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Responsibilities
1. Develop verification specifications and plans for complex SoCs and IP blocks
2. Lead and execute verification at module, cluster, and top-level
3. Design and implement UVM-based test environments for functional, gate-level, and low-power simulations
4. Develop reusable Verification IP (VIP) using the UVM framework
5. Integrate reference models and VIP components into SystemVerilog and SystemC testbenches
6. Develop reference models in SystemVerilog, Matlab, or Python
7. Execute and analyze regression simulations and monitor coverage progress
8. Debug digital modules using advanced simulation and formal verification tools
9. Contribute to system-level simulations and virtual prototyping using SystemVerilog UVM and SystemC
10. Understand system and IP requirements and specifications and derive corresponding test strategies
11. Verify UWB-related digital designs, including protocol logic, timing behavior, and RF-related digital signal processing paths
Profile
12. Degree in Electrical Engineering, Computer Engineering, Computer Science, Physics or a related field
13. Strong experience with SystemVerilog and UVM, ideally including SystemC
14. Proven background in digital verification, including simulation and formal methods
15. Practical experience in UWB (Ultra-Wideband) verification is mandatory
16. Familiarity with SoC verification environments and EDA tools
17. Knowledge of Matlab and/or Python is beneficial
18. Strong analytical thinking, problem-solving skills and attention to detail
19. Enjoys collaborative work with design, system and lab teams
Benefits
20. A very renowned company
21. Remote Work possible