Senior Digital ASIC Development/Verification Engineer
Advantest enables tomorrow’s technology. IoT, 5G, and Artificial Intelligence are unthinkable without us. We produce more than half of all microchips worldwide.
Key Responsibilities:
* Implement mixed and full-custom blocks in CMOS schematics and layout
* HDLCoding in mixed-signal environments
* Support top-level and block-level behavior modeling and chip-level physical design
* Specification-based simulations, verification on module and chip levels with structural and behavior models
* Analysis of circuits including process variance
* Performance reporting and documentation
* Modeling of circuits in High-Level Languages
* Verification of digital and analog circuits
* Provide guidance and advice to team members and managers
* Cross-functional collaboration and maintain linkage to Chip Top-Level-, HW-, SW-, and Maintenance engineering teams
Qualifications:
* A university degree or equivalent in Electrical Engineering (EE)
* A background in digital design (SOC), Application Specific Integrated Circuit (ASIC) design methodologies, and silicon development cycle
* Experience in Register Transfer Level (RTL) coding (Verilog)
* Experience with standard simulation tools for digital designs
* Basics knowledge about UNIX* or Linux* environment and using programming languages
* Technical communication, teamwork, and problem-solving skills
* English language skills