Your Job:
This research primarily seeks to incorporate advanced neuron models, such as those capturing dendritic computation and probabilistic Bayesian network behavior, into unconventional computing architectures, replacing conventional structureless and deterministic LIF point-neuron models. This is pursued through circuit designs that exploit and control memristor dynamics (, local activity and stochasticity). For example, localized dendritic activation underlies numerous computational functions across hierarchical levels, such as denoising (filtering), increased expressivity (tunable local activation), multi-timescale adaptation (local memory), and stimulus-specific adaptation (multi-task processing). While the co-optimization of dendrite-inspired functional circuits with emerging memory devices has only recently been explored, this doctoral project aims to advance that frontier.
Initially, the research will explore CMOS–memristor hybrid implementations, leveraging their analog tunability and high-order dynamics to realize dendrite-inspired functional circuits. These circuits will subsequently be integrated as core computational modules within unconventional computing architectures, enabling algorithm–circuit co-optimization across the computing pipeline with respect to key metrics such as power consumption, computational delay, and area efficiency. Beyond circuit prototyping, the project will conduct task-level benchmarking to evaluate overall system performance in relation to both dendrite–neurosynaptic functionalities and the intrinsic characteristics of memristive devices.
You, as a doctoral researcher, will:
1. Explore energy–delay efficient unconventional computing architectures through both simulation and experimental prototyping
2. Perform iterative hardware–algorithm co-design, accounting for real-world device features and non-idealities
3. Contribute to benchmarking and evaluation frameworks, identifying “champion” designs for PCB or IC prototyping
More specifically, you will:
4. Conduct numerical modeling and validation of brain-inspired algorithms
5. Develop circuit-plausible training and inference algorithms, and analyze their behavior in LTspice and Cadence Spectre
6. Perform algorithm–circuit co-optimization and hardware-aware modeling
7. Quantify performance and benchmark results against state-of-the-art architectures
8. Support tape-out and testing of prototype circuits using Altium Designer and Cadence Virtuoso
9. Set up experimental systems for circuit measurements and data analysis
10. Collaborate within a cross-disciplinary team involving neuroscientists, device physicists, and algorithm developers
Your Profile:
11. Bachelor’s degree with subsequent Master’s in electrical or electronic engineering or a closely related discipline
12. Strong foundation in analog/mixed-signal circuit