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Design management team lead

München
TSMC
Designer
Inserat online seit: 3 Mai
Beschreibung

Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in global semiconductor industry. The Company employs a global workforce of over 82.TSMC produces the chips that are found in smart phones, tablets, computers, smart TVs, cars, laptops, games consoles, data centers and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.
At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your work will enable chip innovation possible by developing and optimizing all aspects in the pre-silicon design flow, including:

Develop internal test chips as TSMC design-process co-optimization vehicles
Develop memory controller for nonvolatile memory

Lead a team in the development of embedded nonvolatile memory test chips and intellectual property (IP). Define, explore, and document the architecture and micro-architecture of RTL designs based on specified requirements.
Collaborate with circuit design and product engineering teams to clarify macro interfaces, as well as testing and manufacturing requirements.
Collaborate with the P&R team to specify SDC for synthesis and P&R, perform logic synthesis (using tools such as Design Compiler or Cadence), and conduct LEC (Logic Equivalency Checking) and STA analysis.
Identify design and design flow problems suitable for automation. Develop programs/scripts for automation using Python, C/C++, or other common scripting languages.
Special Tasks: Conduct Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) checks and design. Collaborate with circuit teams, product engineering, and test engineering to debug and validate the test chip.

Master's degree or above in Electrical Engineering or a related field.
Over 10 years of experience in logic design or circuit design for non-volatile memory technologies, including flash memory, RRAM, MRAM, or PCRAM.
Proficient in using EDA tools and methodologies for both custom and digital design of non-volatile memory.

It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by applicable law.

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