The Silicon Engineering Group is responsible for developing cutting edge chips that can be found in all of your favourite Apple products. Our power management design team in Nabern (close to Stuttgart) has a unique opportunity for a motivated, collaborative, and solution-oriented intern to actively contribute to our chip development. We are looking for a Design Verification Intern in our team, who will enable bug-free first silicon for our mixed-signal designs, in close collaboration with our team of Digital and Analog Design engineers. The responsibilities involve all phases of pre-silicon verification including establishing design verification methodology and test-plan development. Additional responsibilities will include verification environment development, such as stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out. Currently pursuing a BS, or MS in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related field. At the end of the internship, you must return to school to continue your education or the internship must be the last requirement for you to graduate. English language fluency (written and verbal) and collaboration skills Excellent communication and interpersonal skills, combined with the ability to collaborate Ability to work well on a team, take ownership and motivate self and others Knowledge of SystemVerilog and UVM Experience with Python, Perl or TCL Good knowledge of Object Oriented Programming Available for 6 months or more Experience developing scalable and portable test-benches Good understanding of digital design and basic knowledge of mixed signal verification